1. Field of the Invention
This invention relates to serial port interfaces for analog-to-digital converters. In particular, the invention relates to serial port interface systems and methods for providing access to conversion data and internal registers through serial data input and output pins.
2. Description of Related Art
An analog-to-digital converter ("ADC") includes circuitry for converting analog input information into relative digital data information. This digital data information is called "conversion data" and is generally stored in a conversion data register in the ADC. This conversion data register may be of various sizes, but is typically multiples of 8-bits in size (e.g., a 24-bit data conversion register). ADCs also include registers that are used by the ADC on-chip controller to control the operation of the chip. For example, the on-chip controller may use a register to determine whether an external device has requested a read of the conversion data register or has requested a read from or a write to another on-chip register. A variety of on-chip registers may be provided with a variety of functions being performed by the on-chip controller depending upon the contents of those on-chip registers. External devices communicate with the on-chip controller through data written to the on-chip registers through the serial port interface of the ADC. ADCs may have various numbers of external pins (e.g., a 20-pin ADC) that are used to communicate with external devices.
ADCs generally include an on-chip controller that manages chip operation, which may utilize an internal clock, and a plurality of internal registers associated with the controller. One of these registers may be a command register (e.g. 8-bit) that is used to interpret instructions received from an external device through the serial data input pin of the ADC, which is part of the serial port interface. When power is applied, and the device has been reset, the serial data input pin may be initialized into a command mode, where the chip may wait for a command to be written to the command register through the serial data input port. In this command mode, for example, the first 8 bits provided by an external device to the serial data input pin may be placed into the command register. Once this command word has been decoded by the on-chip controller, the serial data input pin may enter a data mode. In this data mode, the serial clock pulses provided by the external device through an input pin shifts data either into the ADC through the serial data input pin or out of the ADC through the serial data output pin. In this manner, the external device may read from or write to the contents of on-chip registers.
Because the on-chip registers include registers that affect the operation of the ADC and the data conversion process, it is important that these on-chip registers are not corrupted by invalid commands, and unintended data transfer to on-chip registers. For example, with the loss of command synchronization, on-chip internal registers might become corrupted by being unintentionally overwritten. Thus, it is desirable to provide a serial port interface having the ability to control the serial port interface upon receipt of an invalid command to protect against corruption of on-chip registers.
Another internal register in an ADC may be a configuration register. Generally, the user may instruct the on-chip controller to perform certain operations through data written to the configuration register. For example, when a new word is written to the configuration register, the controller may decode the word and execute the instructions associated with the word written to the configuration register. Various instructions may be associated with particular bits of the configuration register. Other internal registers may also be provided, such as gain registers and offset registers that may be used in calibrating and operating the data conversion process.
Because there are numerous on-chip registers that may need to be set up at the same time to initialize the ADC and its data conversion process, it is desirable to provide a serial port interface having the ability to access multiple registers with a single read/write command. Although a prior ADC has provided access to multiple registers, it did so by requiring particular bits to be set in a configuration register, before data could be written to or read from the multiple registers.
The serial port interface of the ADC provides serial data access to external devices and includes a subset of the total external pins of the ADC. Prior devices have had multiple pin serial port interface modes including 5-pin, 4-pin and 3-pin modes. Two important industry standard serial port interface protocols, which are both 3-pin protocols, are the SPI interface protocol and the MICROWIRE interface protocol.
Some previous ADCs have achieved a 3-pin mode, but have typically required the use of an external pin to place the chip into a 3-pin mode. For example, an ADC from Crystal Semiconductor (Austin, Tex.), having the designation CS5516, provided a 3-pin interface mode by setting an external pin (SMODE pin) to a logic level "1" (e.g., tied to supply voltage). When this was done, the serial interface would operate as a 3-wire interface using only the SDO pin (serial data output), the SDI pin (serial data input) and the SCLK pin (serial clock). In the 3-wire mode, the CS pin (chip select) would be tied to ground, i.e., logic level "0." The DRDY pin (data ready) would operate normally, but instead of being used by the external device in the 3-pin mode, this pin would modify the behavior of the SDO pin, allowing the SDO pin to signal the user when conversion data was available. To read conversion data from the conversion data register when in 3-pin mode, the user would first write the appropriate one-byte command word to the SDI pin. The SDO output, which was normally high, would then transition to a low logic level when data was ready to be read. The user could then use 8 SCLKs to the SCLK pin to clear this data ready signal on the SDO pin. On the falling edge of the 8th SCLK, the SDO pin would present the first bit of the 24-bit output word of the conversion data register. Next, 24 SCLKs could then be issued to read the data from the conversion data register via the SDO pin. Once this data read was completed, the SDO pin would transition back to a high logic level.
Other ADCs have provided a 3-pin mode, but have done so by requiring an on-chip register to be interrogated to determine if conversion data is ready to be accessed. For example, an ADC available from Analog Devices (Norwood, Mass.), having the designation AD7714, has provided a three-pin, or three-wire, interface, but did so by requiring a bit of an on-chip register to be interrogated by the external device to determine the status of the external DRDY (data ready) pin, and thereby determine if data was ready to be accessed. A logic low on the external DRDY pin would indicate that a new output conversion data word was available. In the 3-pin mode, although the DRDY pin would not be directly accessed by the external device, the interrogated bit of the on-chip register would indicate the status of the DRDY pin.
It is desirable to provide a serial port interface having the ability to enter a 3-pin mode without requiring the use of an external pin to enter 3-pin mode or requiring the interrogation of an on-chip register to determine if data is ready to be accessed.
What is needed, therefore, is a serial port interface system and method that are capable of more efficiently achieving a 3-pin mode with only three pins, are capable of determining if an invalid command has been received and allow for hold and recovery upon an invalid command, and are capable of allowing an external device to access multiple registers with a single read/write command.